Merge: 7082b6e34a 88f83280dc

Merged riscv_new branch

* fixes broken compilation after merging

Add missing TFenceFlags and TRoundingMode for riscv32

Fix default CPUs for riscv32

Add support for softfloat in RISCV RTL.

prepare source to also support riscv32 code

Replace obsolete scall by ecall instruction

Add missing and needed syscall_nr_XXX

Add si_XXX.inc files, pointing to riscv64 counterparts

Add riscv32 mathu inculde file, redirecting to ../riscv64/mathu.inc file (this file seems to have no 64-bit specific code)

Correct computation of operatingsystem_parameter_envp, which wrongly pointed to the NIL pointer separating argv from environment variables

* Set softfloat_rounding_mode indise SetRoundMode function for all CPUs.
* SetRoundMode returns previous rounding mode value for all CPUs.

+ RiscV32: setjmp/longjmp implementation, based on the RiscV64 one

o RiscV64 glibc startup code fixed:
* there is no _init/_fini, call libc_csu_* instead
* fix loading of global_pointer

* RiscV: corrected setup of gp

+ RiscV: initial implementation of gprof support
* cleanup

* RiscV32: fpc_longjmp needs nostackframe directive
* RiscV: unified procedure directives of fpc_*jmp

* RiscV: unified cpu initialization and FPU exception handling, resolves 0038893

* unit name fixed

* library list for esp32c3 for IDF 5.0

* typo fixed

Added changes that didn't commit in merge 427

* rtl part of gitlab 0035433

Simplify required link libraries and move libc, libm and libgcc to end.

Add esp32c3 units to namespaced.

* typo

* simplify SysResetFPU

* switch RISC-V 32 RTL to provide atomic intrinsic helpers instead of Interlocked* functions

* switch RISC-V 64 RTL to provide atomic intrinsic helpers instead of Interlocked* functions

Use '__global_pointer$' special linker symbol to set gp,
because its value can be different from __BSS_END__ - 0x800.

Details from binutils-2.40/ld/emulparams/elf32lriscv-defs.sh
// We must cover as much of sdata as possible if it exists. If sdata+bss is
// smaller than 0x1000 then we should start from bss end to cover as much of
// the program as possible. But we can't allow gp to cover any of rodata, as
// the address of variables in rodata may change during relaxation, so we start
// from data in that case.
OTHER_END_SYMBOLS="${CREATE_SHLIB-__BSS_END__ = .;
__global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800,
MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800));}"

* upated syscalls
+ RiscV specific syscalls added

+ add an SysInitFPU implementation

* unify SysInitFPU and SysResetFPU on RiscV

* RiscV: unify memory barrier functions

* RiscV: unify stack related functions

+ atomic operations for RV32

* cleanup

+ RiscV64: make use of rev8 instruction

+ RiscV: UMul64x64_128 assembler implementation
+ test